Zobrazení zdroje stránky Virtualní procesor 5

=Introduction=
This design is heavily influenced by Z80 CPU instruction set design. For simplification only one supported value type is unbounded integer. The virtual processor is designed to be simply implementable in various high or low level languages as well as other assemblers. Such virtual machine can be used as starting point for new compilers. It solves basic question to which target language should new compiler compile source code. Originally creators of compilers made their application to compile to machine code or assembler for their computer CPU. Today in multi-platform connected world it is not wise to create compiler for single physical machine code. Then if compiler should be multi-target then to which multiple targets should it compile? There should be one simple virtual machine which will be possible to compile to and also to be implemented within any other language. 
Such Turing complete simple virtual low level code was already design as esoteric language [https://en.wikipedia.org/wiki/Brainfuck Brainfuck]. This language have pretty limiter instruction set but is good starting point for testing creation of own interpreter and compiler.

=Characteristics=

* Register based
* Small number of simple instructions
* Multiple generic-purpose integer registers
* Linear memory with each cell as integer number

=Instruction structure=
* Each instruction can have 0, 1 or 2 parameters.
* Each parameter can be either constant (n), generic register (Rx) or special register (IP, SP, ...).
* Each parameter can be indirect as pointer to memory. Expressed in square brackets [].

'''Examples:'''
* LD R0, n
* LD R0, R1
* LD R0, SP
* LD R0, [n]
* LD R0, [R1]
* LD R0, [SP]
* LD [R0], n
* LD [R0], R1
* LD [R0], [R1]

==Special registers==

* IP (Instruction Pointer) - Pointer to current instruction in program memory 
* SP (Stack Pointer) - Pointer to top of stack. Used with connection with stack oriented operations as PUSH, POP, CALL and RET.

=Instructions=

{| class="wikitable sortable"
! Index !! Shortcut !! Full name !! Description
|-
| 0 || NOP || No Operation || Do nothing.
|-
| 1 || HALT || Halt execution || Stop program execution.
|-
| 2 || LD p1, p2 || Load || Load first parameter with value of second parameter.
|-
| 3 || INC p1 || Increment || Increment parameter value by 1 up.
|-
| 4 || DEC p1 || Decrement || Decrement parameter value by 1 down.
|-
| 5 || PUSH p1 || Push to stack || Push value of given parameter to top of the stack.
|-
| 6 || POP p1 || Pop from stack || Pop value from top of the stack.
|-
| 7 || CALL p1 || Call subroutine || Push return address to stack and jump to given address.
|-
| 8 || RET || Return from subroutine || Return from subroutine. Returned address is read from the stack.
|-
| 9 || JP p1 || Jump to absolute address || Jumps to new absolute address.
|-
| 10 || JR p1 || Jump to relative address || Jumps to address relative from current IP. 
|-
| 11 || ADD p1, p2 || Addition || Add p2 to p1 .
|-
| 12 || SUB p1, p2 || Subtraction || Subtract p2 from p1 .
|-
| 13 || MUL p1, p2 || Multiplication || Add p2 to p1 .
|-
| 14 || DIV p1, p2 || Division || Divide p1 by p1.
|-
| 15 || MOD p1, p2 || Modulus || Set p1 to remainder by p1 divided by p2.
|-
| 16 || EX p1, p2 || Exchange || Exchange values of p1 and p2.
|-
| 17 || IN p1, p2 || Input || Store value read from input port p2 to p1.
|-
| 18 || OUT p1, p2 || Output || Write p2 to output port p1.
|-
| 19 || SKIP p1, condition || Skip next instruction || Skips instruction if condition is fulfilled for p1 parameter. Condition can be 0 - Zero (Z), 1 - Not Zero (NZ), 2 - Negative (N), 3 - Positive (P)
|-
| 20 || SYS p1 || System Call || Call system function with index p1. Parameters are stored on the stack.
|}

==TODO==

* Interrupts (INT, RETI, EI, DI), vector table, exceptions
* Bit operations (SET, RES, BIT)
* Shifts and Rotation (SHL, SHR, ROL, ROR)
* Logic operation (NOT, OR, XOR, AND)
* Block operations
** Z80 style: (LDI, LDD, LDIR, LDDR), 3 parameters operations?
** x86 style: (REP MOVS, STOS, LODS, INS, OUTS), can be possibly used with other instructions
* Indexed memory access p1, [p2 + p3]
* Flags (Carry?)
* Multi-core support
* Memory protection

[[Kategorie: Programování]]