Virtual CPU Instruction Set: Porovnání verzí

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Řádek 11: Řádek 11:
! CPU !! Instruction count !! Instruction size [bits] !! Data size [bits] !! Addressable memory [bits] !! Registers
! CPU !! Instruction count !! Instruction size [bits] !! Data size [bits] !! Addressable memory [bits] !! Registers
|-
|-
| [https://www.bigmessowires.com/2010/11/03/tiny-cpu-instruction-set/ Tiny CPU Instruction Set]
| [https://www.bigmessowires.com/2010/11/03/tiny-cpu-instruction-set/ Tiny CPU Instruction Set] || 22 || 8-16 || 8 || 10 || PC, SP, A, X, SR
|-
|-
| [https://zipcpu.com/zipcpu/2018/01/01/zipcpu-isa.html A Quick Introduction to the ZipCPU Instruction Set]
| [https://zipcpu.com/zipcpu/2018/01/01/zipcpu-isa.html A Quick Introduction to the ZipCPU Instruction Set] || 29 || 32 || 32 || 32 || R0-R13, PC, CC
|-
|-
| [https://www.clear.rice.edu/elec422/1996/bomb/instrset.html MINI-CPU Instruction Set Specification] || 12 || 4-12 || 8 || 8 || PC, ACC, R
| [https://www.clear.rice.edu/elec422/1996/bomb/instrset.html MINI-CPU Instruction Set Specification] || 12 || 4-12 || 8 || 8 || PC, ACC, R
Řádek 19: Řádek 19:
| [https://bartoszsypytkowski.com/simple-virtual-machine/ Simple Virtual Machine] || 18 || 8 || 32 || 32 || PC, SP, FP
| [https://bartoszsypytkowski.com/simple-virtual-machine/ Simple Virtual Machine] || 18 || 8 || 32 || 32 || PC, SP, FP
|-
|-
| [https://github.com/skx/simple.vm Simple virtual machine which inteprets bytecode.]
| [https://github.com/skx/simple.vm Simple virtual machine which interprets bytecode.] || 36 || 16-32 || 16-32 || 16-32 || IP, FLAGS, R0-R9, SP
|-
|-
| [https://www.informatik-vollmer.de/software/vam-manual.pdf VAM Virtual Assembler Machine]
| [https://www.informatik-vollmer.de/software/vam-manual.pdf VAM Virtual Assembler Machine] || 58 || 16-32 || 16-32 || 16-32 || R0-Rn (IP, SP)
|-
|-
| [https://schweigi.github.io/assembler-simulator/instruction-set.html Simple 8-bit Assembler Simulator]
| [https://schweigi.github.io/assembler-simulator/instruction-set.html Simple 8-bit Assembler Simulator] || 60 || 8 || 8 || 8 || PC, SP, A, B, C, D
|-
|-
| [https://user.eng.umd.edu/~blj/RiSC/RiSC-isa.pdf The RiSC-16 Instruction-Set Architecture]
| [https://user.eng.umd.edu/~blj/RiSC/RiSC-isa.pdf The RiSC-16 Instruction-Set Architecture] || 8 || 16 || 16 || 16 || PC, R0-R7
|-
|-
| [https://introcs.cs.princeton.edu/java/62toy/ TOY Machine] || 16 || 16 || 16 || 8 (256 words) || PC, R0-R15
| [https://introcs.cs.princeton.edu/java/62toy/ TOY Machine] || 16 || 16 || 16 || 8 (256 words) || PC, R0-R15
|-
|-
| [http://www.cs.man.ac.uk/~pjj/cs1001/arch/node2.html Instruction Execution on MU0] || 8 || 16 || 16 || 12 || PC, ACC
| [http://www.cs.man.ac.uk/~pjj/cs1001/arch/node2.html MU0] || 8 || 16 || 16 || 12 || PC, ACC
|-
|-
| [https://en.wikipedia.org/wiki/LC-3 LC-3] || 15 || 16 || 16 || 16 || PC, R0-R7
| [https://en.wikipedia.org/wiki/LC-3 LC-3] || 15 || 16 || 16 || 16 || PC, R0-R7
|-
| [https://pcengines.ch/toy2.htm TOY/2 - a minimalist 16 bit CPU] || 15 || 16 || 16 || 16 || PC, A, T
|-
| [http://samples.jbpub.com/9781449600068/00068_CH04_Null3e.pdf MARIE: An Introduction to a Simple Computer] || 9 || 16 || 16 || 12 || PC, ACC
|-
| [https://www.eeweb.com/profile/max-maxfield/articles/building-a-4-bit-computer-the-instruction-set Building a 4-Bit Computer: The Instruction Set] || 16 || 4 || 4 || 12 || R0-R5, S0, S1, PC, SP, IX, IV, TA
|-
| [https://www.codeproject.com/articles/43176/how-to-create-your-own-virtual-machine How to create your own virtual machine] || 35 || 8 || 8 || 16 || A, B, X, Y, D
|-
| [https://en.wikipedia.org/wiki/Little_man_computer Little Man Computer] || 10 || 12 || 8 || 8 || A
|-
| [https://github.com/Member1221/CRISC CRISC] || 32 || struct || 64 || 16-64 ||
|-
| [https://en.wikipedia.org/wiki/CHIP-8 CHIP-8] || 35 || 16 || 8 || 12 || V0-V15, I
|-
| [https://github.com/freedosproject/toycpu Toy CPU] || 14 || 8 || 8 || 8 || A
|-
| [https://codegolf.stackexchange.com/questions/171095/8bit-virtual-machine 8bit virtual machine] || 28 || 8 || 8 || 8 || PC, A, X
|}

=Instruction parameters styles=

Types of architectures:
* '''Direct''' - An address to memory is used as a parameter.
* '''Accumulator''' - Accumulator based architecture which has special register called accumulator to hold value for operations. There can be more special registers in addition to accumulator.
* '''Registers''' - Uses multiple general-purpose registers to hold value for operations.
* '''Stack''' - Parameters and results for operations are kept on top of the stack.

{| class="wikitable sortable"
! Instruction !! Meaning !! Direct !! Accumulator !! Registers !! Stack
|-
| SET || Set value n to address x || SET (x), n || LOAD A, n || LOAD Rx, n || PUSH n
|-
| COPY || Copy value from address y to address x || COPY (x), (y) || LOAD A, (y)
STORE (x), A
|| LOAD Rx, (y)
STORE (x), Rx
|| PUSH (y)
POP (x)
|-
| COPY || Copy value from address loaded from address y to address x || COPY (x), ((y)) || LOAD A, (y)
LOAD A, (A)<br/>
STORE (x), A
|| LOAD Rx, (y)
LOAD Rx, (Rx)<br/>
STORE (x), Rx
|| PUSH ((y))
POP (x)
|-
| INC || Increment value at address x || INC (x) || LOAD A, (x)
INC A<br/>
STORE (x), A
|| LOAD Rx, (x)
INC Rx<br/>
STORE (x), Rx
|| PUSH (x)
INC<br/>
POP (x)
|-
| ADD || Sum value at address x with value at address y and store to address x || ADD (x), (y) || LOAD A, (x)
ADD A, (y)<br/>
STORE (x), A
|| LOAD Rx, (x)
LOAD Ry, (y)<br/>
ADD Rx, Ry<br/>
STORE (x), Rx
|| PUSH (x)
PUSH (y)
ADD<br/>
POP (x)
|-
| ADD || Sum value at address y with value at address z and store to address x || ADD (x), (y), (z) || LOAD A, (y)
ADD A, (z)<br/>
STORE (x), A
|| LOAD Rx, (y)
LOAD Ry, (z)<br/>
ADD Rx, Ry<br/>
STORE (x), Rx
|| PUSH (y)
PUSH (z)
ADD<br/>
POP (x)
|}
|}

==External links==

* [http://wiki.c2.com/?VirtualMachine Virtual machine on c2 wiki]
* [https://justinmeiners.github.io/lc3-vm/ Write your Own Virtual Machine]
* [https://www.andreinc.net/2021/12/01/writing-a-simple-vm-in-less-than-125-lines-of-c#loading-and-running-programs Writing a simple 16 bit VM in less than 125 lines of C]
* [https://100r.co/site/uxn.html UXN] - personal computing stack based on a small virtual machine


[[Category:Programování]]
[[Category:Programování]]

Aktuální verze z 31. 5. 2024, 16:59

Design goals

  • Simple to implement in other programming languages
  • Efficient to execute by emulator
  • Future extensibility (to support 128-bit data/address width or more)
  • Single instruction code for any data/address width
  • Register based load-store architecture rather than stack based machine or accumulator based machine

Other interesting instruction sets

CPU Instruction count Instruction size [bits] Data size [bits] Addressable memory [bits] Registers
Tiny CPU Instruction Set 22 8-16 8 10 PC, SP, A, X, SR
A Quick Introduction to the ZipCPU Instruction Set 29 32 32 32 R0-R13, PC, CC
MINI-CPU Instruction Set Specification 12 4-12 8 8 PC, ACC, R
Simple Virtual Machine 18 8 32 32 PC, SP, FP
Simple virtual machine which interprets bytecode. 36 16-32 16-32 16-32 IP, FLAGS, R0-R9, SP
VAM Virtual Assembler Machine 58 16-32 16-32 16-32 R0-Rn (IP, SP)
Simple 8-bit Assembler Simulator 60 8 8 8 PC, SP, A, B, C, D
The RiSC-16 Instruction-Set Architecture 8 16 16 16 PC, R0-R7
TOY Machine 16 16 16 8 (256 words) PC, R0-R15
MU0 8 16 16 12 PC, ACC
LC-3 15 16 16 16 PC, R0-R7
TOY/2 - a minimalist 16 bit CPU 15 16 16 16 PC, A, T
MARIE: An Introduction to a Simple Computer 9 16 16 12 PC, ACC
Building a 4-Bit Computer: The Instruction Set 16 4 4 12 R0-R5, S0, S1, PC, SP, IX, IV, TA
How to create your own virtual machine 35 8 8 16 A, B, X, Y, D
Little Man Computer 10 12 8 8 A
CRISC 32 struct 64 16-64
CHIP-8 35 16 8 12 V0-V15, I
Toy CPU 14 8 8 8 A
8bit virtual machine 28 8 8 8 PC, A, X

Instruction parameters styles

Types of architectures:

  • Direct - An address to memory is used as a parameter.
  • Accumulator - Accumulator based architecture which has special register called accumulator to hold value for operations. There can be more special registers in addition to accumulator.
  • Registers - Uses multiple general-purpose registers to hold value for operations.
  • Stack - Parameters and results for operations are kept on top of the stack.
Instruction Meaning Direct Accumulator Registers Stack
SET Set value n to address x SET (x), n LOAD A, n LOAD Rx, n PUSH n
COPY Copy value from address y to address x COPY (x), (y) LOAD A, (y)

STORE (x), A

LOAD Rx, (y)

STORE (x), Rx

PUSH (y)

POP (x)

COPY Copy value from address loaded from address y to address x COPY (x), ((y)) LOAD A, (y)

LOAD A, (A)
STORE (x), A

LOAD Rx, (y)

LOAD Rx, (Rx)
STORE (x), Rx

PUSH ((y))

POP (x)

INC Increment value at address x INC (x) LOAD A, (x)

INC A
STORE (x), A

LOAD Rx, (x)

INC Rx
STORE (x), Rx

PUSH (x)

INC
POP (x)

ADD Sum value at address x with value at address y and store to address x ADD (x), (y) LOAD A, (x)

ADD A, (y)
STORE (x), A

LOAD Rx, (x)

LOAD Ry, (y)
ADD Rx, Ry
STORE (x), Rx

PUSH (x)

PUSH (y) ADD
POP (x)

ADD Sum value at address y with value at address z and store to address x ADD (x), (y), (z) LOAD A, (y)

ADD A, (z)
STORE (x), A

LOAD Rx, (y)

LOAD Ry, (z)
ADD Rx, Ry
STORE (x), Rx

PUSH (y)

PUSH (z) ADD
POP (x)

External links

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