Virtual CPU Instruction Set: Porovnání verzí
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| [https://www.eeweb.com/profile/max-maxfield/articles/building-a-4-bit-computer-the-instruction-set Building a 4-Bit Computer: The Instruction Set] || 16 || 4 || 4 || 12 || 16 |
| [https://www.eeweb.com/profile/max-maxfield/articles/building-a-4-bit-computer-the-instruction-set Building a 4-Bit Computer: The Instruction Set] || 16 || 4 || 4 || 12 || 16 |
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| [https://www.codeproject.com/articles/43176/how-to-create-your-own-virtual-machine How to create your own virtual machine] || 35 || 8 || 8 || 16 || 5 |
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Verze z 16. 12. 2019, 21:51
Design goals
- Simple to implement in other programming languages
- Efficient to execute by emulator
- Future extensibility (to support 128-bit data/address width or more)
- Single instruction code for any data/address width
- Register based load-store architecture rather than stack based machine or accumulator based machine
Other interesting instruction sets
CPU | Instruction count | Instruction size [bits] | Data size [bits] | Addressable memory [bits] | Registers |
---|---|---|---|---|---|
Tiny CPU Instruction Set | |||||
A Quick Introduction to the ZipCPU Instruction Set | |||||
MINI-CPU Instruction Set Specification | 12 | 4-12 | 8 | 8 | PC, ACC, R |
Simple Virtual Machine | 18 | 8 | 32 | 32 | PC, SP, FP |
Simple virtual machine which interprets bytecode. | |||||
VAM Virtual Assembler Machine | |||||
Simple 8-bit Assembler Simulator | 60 | 8 | 8 | 8 | PC, SP, A, B, C, D |
The RiSC-16 Instruction-Set Architecture | 8 | 16 | 16 | 16 | PC, R0-R7 |
TOY Machine | 16 | 16 | 16 | 8 (256 words) | PC, R0-R15 |
MU0 | 8 | 16 | 16 | 12 | PC, ACC |
LC-3 | 15 | 16 | 16 | 16 | PC, R0-R7 |
TOY/2 - a minimalist 16 bit CPU | 15 | 16 | 16 | 16 | PC, A, T |
MARIE: An Introduction to a Simple Computer | 9 | 16 | 16 | 12 | PC, ACC |
Building a 4-Bit Computer: The Instruction Set | 16 | 4 | 4 | 12 | 16 |
How to create your own virtual machine | 35 | 8 | 8 | 16 | 5 |