Virtual CPU Instruction Set: Porovnání verzí
Skočit na navigaci
Skočit na vyhledávání
Bez shrnutí editace |
Bez shrnutí editace |
||
| Řádek 1: | Řádek 1: | ||
==Design goals== |
==Design goals== |
||
* Simple to implement in other languages |
* Simple to implement in other programming languages |
||
* Efficient to execute by emulator |
* Efficient to execute by emulator |
||
* Future extensibility (to support 128-bit data/address width or more) |
* Future extensibility (to support 128-bit data/address width or more) |
||
| Řádek 14: | Řádek 14: | ||
* [https://github.com/skx/simple.vm Simple virtual machine which inteprets bytecode.] |
* [https://github.com/skx/simple.vm Simple virtual machine which inteprets bytecode.] |
||
* [https://www.informatik-vollmer.de/software/vam-manual.pdf VAM Virtual Assembler Machine] |
* [https://www.informatik-vollmer.de/software/vam-manual.pdf VAM Virtual Assembler Machine] |
||
* [https://schweigi.github.io/assembler-simulator/instruction-set.html Simple 8-bit Assembler Simulator] |
|||
[[Category:Programování]] |
[[Category:Programování]] |
||
Verze z 11. 7. 2019, 12:20
Design goals
- Simple to implement in other programming languages
- Efficient to execute by emulator
- Future extensibility (to support 128-bit data/address width or more)
- Single instruction code for any data/address width
- Register based load-store architecture rather than stack based machine or accumulator based machine