Virtual CPU Instruction Set: Porovnání verzí

Z ZděchovNET
Skočit na navigaci Skočit na vyhledávání
Bez shrnutí editace
Bez shrnutí editace
Řádek 19: Řádek 19:
| [https://bartoszsypytkowski.com/simple-virtual-machine/ Simple Virtual Machine] || 18 || 8 || 32 || 32 || PC, SP, FP
| [https://bartoszsypytkowski.com/simple-virtual-machine/ Simple Virtual Machine] || 18 || 8 || 32 || 32 || PC, SP, FP
|-
|-
| [https://github.com/skx/simple.vm Simple virtual machine which inteprets bytecode.]
| [https://github.com/skx/simple.vm Simple virtual machine which interprets bytecode.]
|-
|-
| [https://www.informatik-vollmer.de/software/vam-manual.pdf VAM Virtual Assembler Machine]
| [https://www.informatik-vollmer.de/software/vam-manual.pdf VAM Virtual Assembler Machine]
Řádek 29: Řádek 29:
| [https://introcs.cs.princeton.edu/java/62toy/ TOY Machine] || 16 || 16 || 16 || 8 (256 words) || PC, R0-R15
| [https://introcs.cs.princeton.edu/java/62toy/ TOY Machine] || 16 || 16 || 16 || 8 (256 words) || PC, R0-R15
|-
|-
| [http://www.cs.man.ac.uk/~pjj/cs1001/arch/node2.html Instruction Execution on MU0] || 8 || 16 || 16 || 12 || PC, ACC
| [http://www.cs.man.ac.uk/~pjj/cs1001/arch/node2.html MU0] || 8 || 16 || 16 || 12 || PC, ACC
|-
|-
| [https://en.wikipedia.org/wiki/LC-3 LC-3] || 15 || 16 || 16 || 16 || PC, R0-R7
| [https://en.wikipedia.org/wiki/LC-3 LC-3] || 15 || 16 || 16 || 16 || PC, R0-R7

Verze z 19. 9. 2019, 11:46

Design goals

  • Simple to implement in other programming languages
  • Efficient to execute by emulator
  • Future extensibility (to support 128-bit data/address width or more)
  • Single instruction code for any data/address width
  • Register based load-store architecture rather than stack based machine or accumulator based machine

Other interesting instruction sets

CPU Instruction count Instruction size [bits] Data size [bits] Addressable memory [bits] Registers
Tiny CPU Instruction Set
A Quick Introduction to the ZipCPU Instruction Set
MINI-CPU Instruction Set Specification 12 4-12 8 8 PC, ACC, R
Simple Virtual Machine 18 8 32 32 PC, SP, FP
Simple virtual machine which interprets bytecode.
VAM Virtual Assembler Machine
Simple 8-bit Assembler Simulator 60 8 8 8 PC, SP, A, B, C, D
The RiSC-16 Instruction-Set Architecture 8 16 16 16 PC, R0-R7
TOY Machine 16 16 16 8 (256 words) PC, R0-R15
MU0 8 16 16 12 PC, ACC
LC-3 15 16 16 16 PC, R0-R7