Virtual CPU Instruction Set: Porovnání verzí
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Řádek 70: | Řádek 70: | ||
STORE (x), Rx |
STORE (x), Rx |
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|| PUSH (y) |
|| PUSH (y) |
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POP (x) |
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| COPY || Copy value from address loaded from address y to address x || COPY (x), ((y)) || LOAD A, (y) |
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LOAD A, (A)<br/> |
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STORE (x), A |
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|| LOAD Rx, (y) |
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LOAD Rx, (Rx)<br/> |
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STORE (x), Rx |
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|| PUSH ((y)) |
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POP (x) |
POP (x) |
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Aktuální verze z 31. 5. 2024, 16:59
Design goals
- Simple to implement in other programming languages
- Efficient to execute by emulator
- Future extensibility (to support 128-bit data/address width or more)
- Single instruction code for any data/address width
- Register based load-store architecture rather than stack based machine or accumulator based machine
Other interesting instruction sets
CPU | Instruction count | Instruction size [bits] | Data size [bits] | Addressable memory [bits] | Registers |
---|---|---|---|---|---|
Tiny CPU Instruction Set | 22 | 8-16 | 8 | 10 | PC, SP, A, X, SR |
A Quick Introduction to the ZipCPU Instruction Set | 29 | 32 | 32 | 32 | R0-R13, PC, CC |
MINI-CPU Instruction Set Specification | 12 | 4-12 | 8 | 8 | PC, ACC, R |
Simple Virtual Machine | 18 | 8 | 32 | 32 | PC, SP, FP |
Simple virtual machine which interprets bytecode. | 36 | 16-32 | 16-32 | 16-32 | IP, FLAGS, R0-R9, SP |
VAM Virtual Assembler Machine | 58 | 16-32 | 16-32 | 16-32 | R0-Rn (IP, SP) |
Simple 8-bit Assembler Simulator | 60 | 8 | 8 | 8 | PC, SP, A, B, C, D |
The RiSC-16 Instruction-Set Architecture | 8 | 16 | 16 | 16 | PC, R0-R7 |
TOY Machine | 16 | 16 | 16 | 8 (256 words) | PC, R0-R15 |
MU0 | 8 | 16 | 16 | 12 | PC, ACC |
LC-3 | 15 | 16 | 16 | 16 | PC, R0-R7 |
TOY/2 - a minimalist 16 bit CPU | 15 | 16 | 16 | 16 | PC, A, T |
MARIE: An Introduction to a Simple Computer | 9 | 16 | 16 | 12 | PC, ACC |
Building a 4-Bit Computer: The Instruction Set | 16 | 4 | 4 | 12 | R0-R5, S0, S1, PC, SP, IX, IV, TA |
How to create your own virtual machine | 35 | 8 | 8 | 16 | A, B, X, Y, D |
Little Man Computer | 10 | 12 | 8 | 8 | A |
CRISC | 32 | struct | 64 | 16-64 | |
CHIP-8 | 35 | 16 | 8 | 12 | V0-V15, I |
Toy CPU | 14 | 8 | 8 | 8 | A |
8bit virtual machine | 28 | 8 | 8 | 8 | PC, A, X |
Instruction parameters styles
Types of architectures:
- Direct - An address to memory is used as a parameter.
- Accumulator - Accumulator based architecture which has special register called accumulator to hold value for operations. There can be more special registers in addition to accumulator.
- Registers - Uses multiple general-purpose registers to hold value for operations.
- Stack - Parameters and results for operations are kept on top of the stack.
Instruction | Meaning | Direct | Accumulator | Registers | Stack |
---|---|---|---|---|---|
SET | Set value n to address x | SET (x), n | LOAD A, n | LOAD Rx, n | PUSH n |
COPY | Copy value from address y to address x | COPY (x), (y) | LOAD A, (y)
STORE (x), A |
LOAD Rx, (y)
STORE (x), Rx |
PUSH (y)
POP (x) |
COPY | Copy value from address loaded from address y to address x | COPY (x), ((y)) | LOAD A, (y)
LOAD A, (A) |
LOAD Rx, (y)
LOAD Rx, (Rx) |
PUSH ((y))
POP (x) |
INC | Increment value at address x | INC (x) | LOAD A, (x)
INC A |
LOAD Rx, (x)
INC Rx |
PUSH (x)
INC |
ADD | Sum value at address x with value at address y and store to address x | ADD (x), (y) | LOAD A, (x)
ADD A, (y) |
LOAD Rx, (x)
LOAD Ry, (y) |
PUSH (x)
PUSH (y)
ADD |
ADD | Sum value at address y with value at address z and store to address x | ADD (x), (y), (z) | LOAD A, (y)
ADD A, (z) |
LOAD Rx, (y)
LOAD Ry, (z) |
PUSH (y)
PUSH (z)
ADD |
External links
- Virtual machine on c2 wiki
- Write your Own Virtual Machine
- Writing a simple 16 bit VM in less than 125 lines of C
- UXN - personal computing stack based on a small virtual machine